Note to users. If you're seeing this message, it means that your browser cannot find this page's style/presentation instructions -- or possibly that you are using a browser that does not support current Web standards. Find out more about why this message is appearing, and what you can do to make your experience of our site the best it can be.


Science 24 March 2006:
Vol. 311. no. 5768, p. 1735
DOI: 10.1126/science.1122797

Brevia

An Integrated Logic Circuit Assembled on a Single Carbon Nanotube

Zhihong Chen1, Joerg Appenzeller1*, Yu-Ming Lin1, Jennifer Sippel-Oakley2, Andrew G. Rinzler2, Jinyao Tang3, Shalom J. Wind4, Paul M. Solomon1 and Phaedon Avouris1*

1 IBM Thomas J. Watson Research Center, Yorktown Heights, NY 10598, USA.
2 Department of Physics, University of Florida, Gainesville, FL 32611, USA.
3 Department of Chemistry, Columbia University, New York, NY 10027, USA.
4 Department of Applied Physics and Applied Mathematics, Columbia University, New York, NY 10027, USA.


Figure 1 Fig. 1. (A) Scanning electron microscope image of a SWCNT ring oscillator consisting of five CMOS inverter stages. A test inverter was added to determine the parameter set for the actual measurement. (B) Characteristics for the p-type FET with Pd metal gate and n-type FET with Al gate. (C) Inverter characteristics and its mirrored curve. (D) Voltage-dependent frequency spectra. From the left to the right, the respective supply voltages are as follows: Vdd = 0.5 V and 0.56 V to 0.92 V (in 0.4-V increments). [View Larger Version of this Image (61K GIF file)]
 





To Advertise     Find Products


Science. ISSN 0036-8075 (print), 1095-9203 (online)